1. Field of the Invention
The present invention relates to electrical and electronic components, circuits and systems. More specifically, the present invention relates to digital to analog converters.
2. Description of the Related Art
Digital to analog converters are widely used for converting digital signals to analog signals for many electronic circuits. For example, a high resolution, high speed digital to analog converter (DAC) may find application in video circuits, high quality audio, instrumentation applications, and in the transmit path for high dynamic range communications applications. DACs may also be used in high speed analog to digital converters (ADCs) such as successive approximation ADCs or subranging ADCs.
As is known in the art, the function of an analog to digital converter (ADC) is to accurately convert an analog input signal into a digital output represented by a coded array of binary bits. The output bits are generated by processing the analog input signal through a number of comparator steps. There are several types of ADC architectures, each architecture having different characteristics, such as bandwidth, speed, power, and resolution. A flash ADC, for example, produces an N-bit digital output in one step with 2N−1 parallel comparators. Flash ADCs provide higher speed of conversion, but are limited by higher input capacitance, power consumption, and device yield constraints associated with the high number of comparators in the circuitry. At the other extreme, a successive approximation ADC produces an N-bit digital output in N sequential steps using a single comparator. Successive approximation ADCs are simple in structure, and may be very accurate, but they have very slow conversion times due to the serial nature of the conversion process.
Subranging ADCs provide an intermediate compromise between flash ADCs and successive approximation ADCs. Subranging ADCs typically use a low resolution flash quantizer during a first or coarse pass to convert the analog input signal into the most significant bits (MSB) of its digital value. A digital to analog converter (DAC) then generates an analog version of the MSB word, which is subtracted from the input signal at a summing node to produce a residue or residual signal. The residue signal is sent through one or more fine passes (through the same quantizer or additional low resolution quantizers) to produce the lower significant bits of the input signal. The lower significant bits and the MSB word are then combined by digital error correcting circuitry to produce the desired digital output word.
A common type of DAC, the current summing DAC, generates an analog output signal by selectively switching a number of current sources (or cells) into or out of a current summing device in response to a digital input signal. Because of process variables, the multiple current sources required by the DAC cannot be fabricated to exact values. In fact, current sources can vary from one to the next, even on the same die. These inaccuracies result in distortions in the analog output signal. The current sources therefore need to be trimmed to meet the accuracy requirements of the DAC. They can be trimmed to equal one another (unary DACs) or to provide currents with binary weights (binary DACs).
Conventionally, this trimming is accomplished in various ways. A straightforward method is to trim the current setting resistors of the current sources with a laser, in effect changing the value of the resistor chain by burning material off to raise the resistance. This process can only be implemented prior to packaging and therefore will not be able to correct for any post-trim stresses the chip might encounter during cleaning, packaging and sealing. Because the resistors are subject to change when stressed, they must be placed on the chip in locations that will minimize the stress they experience. This impacts and limits the IC layout.
There are other approaches that allow for resistor trimming after packaging, but they generally require significant pad areas because of the high voltages and/or currents required to blow fuse links. These restrictions limit the number of corrections that can be made, thereby limiting the overall resolution or dynamic range of the DAC.
Hence, there is a need in the art for a system or method for lowering distortion of digital to analog converters and analog to digital converters that mitigates the need for trimming after packaging.